Description
The Atmel9 | SMART SAM4E series of Flash microcontrollers is based on the
high-performance 32-bit ARM@ Cortex@-M4 RISC processor and includes a
floating point unit (FPU). It operates at a maximum speed of 120 MHz and
features up to 1024 Kbytes of Flash, 2 Kbytes of cache memory and up to
128 Kbytes of SRAM.
The SAM4E offers a rich set of advanced connectivity peripherals including
10/100 Mbps Ethernet MAC supporting IEEE 1588 and dual CAN. With a single-
precision FPU, advanced analog features, as well as a full set of timing and
control functions, the SAM4E is the ideal solution for industrial automation, home
and building control, machine-to-machine communications, automotive
aftermarket and energy management applications.
The peripheral set includes a full-speed USB device port with embedded
transceiver, a 10/100 Mbps Ethernet MAC supporting IEEE 1588, a high-speed
MCI for SDIO/SD/MMC, an external bus interface featuring a static memory
controller providing connection to SRAM, PSRAM, NOR Flash, LCD Module and
NAND Flash, a parallel I/O capture mode for camera interface, hardware
acceleration for AES256, 2 USARTs, 2 UARTs, 2 TWIs, 3 SPls, as well as a 4-
channel PWM, 3 three-channel general-purpose 32-bit timers (with stepper motor
and quadrature decoder logic support), a low-power RTC, a low-power RTT, 256-
bit General Purpose Backup Registers, 2 Analog Front End interfaces (16-bit
ADC, DAC, MUX and PGA), one 12-bit DAC (2-channel) and an analog
comparator.
The SAM4E devices have three software-selectable low-power modes: Sleep,
Wait and Backup. In Sleep mode, the processor is stopped while all other
functions can be kept running. In Wait mode, all clocks and functions are stopped
but some peripherals can be configured to wake up the system based on
predefined conditions.
The Real-time Event Managment allows peripherals to receive, react to and send
events in Active and Sleep modes without processor intervention.

Features
●Core
ARM Cortex-M4 with 2 Kbytes Cache running at up to 120 MHz1)
Memory Protection Unit (MPU)
DSP Instruction
Floating Point Unit (FPU)
Thumb-2 Instruction Set
●Memories
Up to 1024 Kbytes Embedded Flash
128 Kbytes Embedded SRAM
16 Kbytes ROM with Embedded Boot Loader Routines (UART) and IAP Routines
Static Memory Controller (SMC): SRAM, NOR, NAND Support
NAND Flash Controller
●System
Embedded Voltage Regulator for Single Supply Operation
Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for Safe Operation
Quartz or Ceramic Resonator Oscillators: 3 to 20 MHz Main Power with Failure Detection and Optional Low-
power 32.768 kHz for RTC or Device Clock
RTC with Gregorian and Persian Calendar Mode, Waveform Generation in Backup mode
RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency inaccuracy
High Precision 4/8/12 MHz Factory Trimmed Intemal RC Oscillator with 4 MHz Default Frequency for Device
Startup. In-application Trimming Access for Frequency Adjustment
Slow Clock Internal RC Oscillator as Permanent Low-power Mode Device Clock
One PLL up to 240 MHz for Device Clock and for USB
Temperature Sensor
Low-power tamper detection on two inputs, anti-tampering by immediate clear of general-purpose backup
registers (GPBR)
Up to 2 Peripheral DMA Controllers (PDC) with up to 33 Channels
One 4-channel DMA Controller
●Low-power Modes
Sleep, Wait and Backup modes, down to 0.9 μA in Backup mode with RTC, RTT, and GPBR
●Peripherals
Two USARTs with USART1 (IS07816, IrDA@, RS-485, SPI, Manchester and Modem Modes)
USB 2.0 Device: Full Speed (12 Mbits), 2668 byte FIFO, up to 8 Endpoints. On-chip Transceiver
Two 2-wire UARTs
Two 2-wire Interfaces (TWI)
High-speed Multimedia Card Interface (SDIO/SD Card/MMC)
One Master/Slave Serial Peripheral Interface (SPI) with Chip Select Signals
- Three 3-channel 32-bit Tlmer/Counter blocks with Capture, Waveform, Compare and PWM Mode. Quadrature
Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
32-bit low-power Real-time Timer (RTT) and low-power Real-time Clock (RTC) with calendar and alarm features
256-bit General Purpose Backup Registers (GPBR)
One Ethernet MAC (GMAC) 10/100 Mbps in MII mode only with dedicated DMA and Support for IEEE1588,
Wake-on-LAN
_Two CAN Contollers with eight Mailboxes
4-channel 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time Generator Counter for Motor
Control
Real-time Event Management

●Cryptography
-AES 256-bit Key Algorithm compliant with FIPS Publication 197
●Analog
-AFE (Analog Front End): 2x16-bit ADC, up to 24-channels, Differential Input Mode, Programmable Gain Stage,
Auto Calibration and Automatic Offset Correction
-One 2-channel 12-bit 1 Msps DAC
-One Analog Comparator with Flexible Input Selection, Selectable Input Hysteresis
I/O

-Up to 117 V0 Lines with External Interrupt Capability (Edge or Level Sensitivity), Debouncing, Glitch Filtering
and On-die Series Resistor Termination
-Bidirectional Pad, Analog I/O, Programmable Pul-up/ul-down
- Five 32-bit Parallel InputOutput Controllers, Peripheral DMA Assisted Parallel Capture Mode
●Packages
- 144-ball LFBGA, 10x10 mm, pitch 0.8 mm
- 100-ball TFBGA, 9x9 mm, pitch 0.8 mm
- 144-lead LQFP, 20x20 mm, pitch 0.5 mm
- 100-lead LQFP, 14x14 mm, pitch 0.5 mm