74LVT240PW 118 Buffer Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP
| Nexperia | |
| Product Category: | Buffers & Line Drivers |
| RoHS: | Details |
| 8 Input | |
| 8 Output | |
| Inverting | |
| - 32 mA | |
| 64 mA | |
| 3 mA | |
| 3.6 V | |
| 2.7 V | |
| 12 mA | |
| - 40 C | |
| + 85 C | |
| SMD/SMT | |
| TSSOP-20 | |
| Reel | |
| Cut Tape | |
| MouseReel | |
| Brand: | Nexperia |
| Function: | Buffer/Line Driver |
| Height: | 0.95 mm (Max) |
| Input Signal Type: | Single-Ended |
| Length: | 6.6 mm (Max) |
| Logic Family: | LVT |
| Number of Channels: | 8 |
| Operating Supply Voltage: | 3.3 V |
| Output Type: | 3-State |
| Product Type: | Buffers & Line Drivers |
| Propagation Delay Time: | 2.5 ns at 3.3 V |
| 2500 | |
| Subcategory: | Logic ICs |
| Supply Current - Max: | 12 mA |
| Technology: | BiCMOS |
| Width: | 4.5 mm (Max) |
| Part # Aliases: | 935176340118 |
| Unit Weight: | 0.000212 oz |
Features
• Octal bus interface
• 3-state buffers• Output capability: +64 mA and -32 mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5 V supply
• Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
• Live insertion and extraction permitted
• Power-up 3-state
• No bus current loading when output is tied to 5 V bus
• Latch-up protection– JESD78 Class II exceeds 500 mA
• ESD protection:– MIL STD 883 method 3015: exceeds 2000 V– MM JESD22-A115-A exceeds 200 V
Description
The 74LVT240 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.This device is
an octal inverting buffer that is ideal for driving bus lines. The devicefeatures two output enable pins
(1OE, 2OE), each controlling four of the 3-State outputs.
Functional diagram
Pinning information
Pin description
Features
• Octal bus interface
• 3-state buffers• Output capability: +64 mA and -32 mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5 V supply
• Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
• Live insertion and extraction permitted
• Power-up 3-state
• No bus current loading when output is tied to 5 V bus
• Latch-up protection– JESD78 Class II exceeds 500 mA
• ESD protection:– MIL STD 883 method 3015: exceeds 2000 V– MM JESD22-A115-A exceeds 200 V
Description
The 74LVT240 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.This device is
an octal inverting buffer that is ideal for driving bus lines. The devicefeatures two output enable pins
(1OE, 2OE), each controlling four of the 3-State outputs.
