LTC1326CS8-2.5#PBF Supervisory Circuits Micropower Precision Triple Supply Monitor

LTC1326CS8-2.5#PBF Supervisory Circuits Micropower Precision Triple Supply Monitor

DESCRIPTION
The LTC1326/LTC1326-2.5 are triple supply monitors
intended for systems with multiple supply voltages. They
provide micropower operation, small size and high accU-
racy supply monitoring.
Tight 0.75% threshold accuracy and glitch immunity
ensure reliable reset operation without false triggering.
The 20μA typical supply current makes the LTC1326/
LTC1326-2.5 ideal for power-conscious systems.
The RST output is guaranteed to be in the correct state for
Vcc3, VCcs5 orVcc25 downto 1V. TheLTC1326/LTC1326-2.5
can be configured to monitor one, two or three inputs,
depending on system requirements.
A manual push-button reset input provides the ability to
generate a very narrow“soft" reset pulse (100us typ) ora
200ms reset pulse equivalent to a power-on reset. Both
SRST and RST outputs are open-drain and can be OR-tied
with other reset sources.

FEATURES
■Simultaneously Monitors Three Supplies
  LTC1326: 5V, 3.3V and ADJ
  LTC1326-2.5: 2.5V, 3.3V and ADJ
■Guaranteed Threshold Accuracy: +0.75%
■Low Supply Current: 20μA
■Internal Reset Time Delay: 200ms
■Manual Push-Button Reset Input
■Active Low and Active High Reset Outputs
■Active Low“Soft" Reset Output
■Power Supply Glitch Immunity
■Guaranteed RESET for Vcc3≥1V or Vccs≥1V
   or Vcc25≥1V
■8-Pin So and MSOP Packages

APPLICATIONS
■Desktop Computers
■Notebook Computers
■Itelligent Instruments
■Portable Battery-Powered Equipment

PIN FUNCTIONS
Vcc3 (Pin 1): 3.3V Sense Input and Power Supply Pin for
the IC Bypass to ground with≥0.1μF ceramic capacitor.
Vcc5 (Pin 2) (LTC1326): 5V Sense Input. Used as gate
drive for the RST output FET when the voltage on Vcc3 is
less than the voltage on Vcc5- If unused, it can be tied to
Vcc3 (see Dual and Single Supply Monitor Operation in
the Applications Information section).
Vcc25 (Pin2) (LTC1326-2.5): 2.5V Sense Input. Used as
gate drive for RST output FET when the voltage on Vcc3
is less than the voltage on Vcc25. If unused, it can be tied
to Vcc3.
VccA (Pin 3): 1V Sense, High Impedance Input. Can be
used as a logic input with a 1V threshold. If unused, it can
be tied to either Vcc3 or Vcc25-.
GND (Pin 4): Ground.
RST (Pin 5): Reset Logic Output. Active high CMOS logic
output, drives high to VCc3. buffered complementof RST.
An external pull-down on the RST pin will drive this pin
high.

RST (Pin 6): Reset Logic Output. Active low, open-drain
logic output with weak pull-up to Vcc3. Can be pulled up
greater than Vcc3 when interfacing to 5V logic. Asserted
when one or more of the supplies are below trip
thresholds and held for 200ms after all supplies become
valid. Also asserted after PBR is held low for more than
2 seconds and for an additional 200ms after PBR is
released.
SRST (Pin 7): Soft Reset. Active low, open-drain logic
output with weak pull-up to Vcc3. Can be pulled up
greater than Vcc3 when interfacing to 5V logic. Asserted
for 100us after PBR is held low for less than 2 seconds
and released.
PBR (Pin 8): Push-Button Reset. Active low logic input
with weak pull-up to Vcc3. Can be pulled up greater than
Vcc3 when interfacing to 5V logic. When asserted forless
than 2 seconds, outputs a soft reset 100μs pulse on the
SRST pin. When PBR is asserted for greater than 2
seconds, the RST output is forced low and remains low
until 200ms after PBR is released.