SMM665BFT-615L Translation Voltage Levels 3.3V Ultrasmall Any-Input-To-LVPECL IC Chips
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Integrated Circuits ICs
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Specifications
Date Code:
Newest Code
Shipping By:
DHL/UPS/Fedex
Condition:
New*Original
Warranty:
365days
Lead Free:
Rohs Compliant
Lead Times:
Immediately Shipment
Package:
QFN-64
Mounting Style:
SMD/SMT
Highlight:
SMM665BFT-615L
,SMM665BFT-615L IC chips
Introduction
SMM665BFT-615L Translation Voltage Levels 3.3V Ultrasmall Any-Input-to-LVPECL IC chips
| Microchip | |
| Product Category: | Translation - Voltage Levels |
| RoHS: | Details |
| CML/CMOS/HSTL/LVDS/SSTL/TTL to LVPECL | |
| SMD/SMT | |
| MLF-8 | |
| 3 V | |
| 3.6 V | |
| - 40 C | |
| + 85 C | |
| 400 ps | |
| Reel | |
| Cut Tape | |
| MouseReel | |
| Brand: | Microchip Technology |
| Logic Family: | ECL |
| Logic Type: | Translator |
| Moisture Sensitive: | Yes |
| Product Type: | Translation - Voltage Levels |
| Subcategory: | Logic ICs |
| Part # Aliases: | SY89327LMG TR |
| Unit Weight: | 0.000384 oz |
Description
The SY89327L is a fully differential, high-speed translator
optimized to accept any logic standard from single-ended
TTL/CMOS to differential LVDS, HSTL, or CML and translate
it to LVPECL. Translation is guaranteed for speeds up to
2.5Gbps (2.5GHz toggle frequency). The SY89327L does
not internally terminate its inputs because different interfacing
standards have different termination requirements.
The SY89327L is a member of Micrel's Precision Edge⑧
family of high-speed logic devices. This family features ultra-
small packaging, as well as high signal integrity and
operation at many different supply voltages.
All support documentation can be found on Micrel's web
site at www.micrel.com.
■Input accepts virtually all logic standards:
●Single-ended: SSTL, TTL, CMOS
●Differential: LVDS, HSTL, CML
■Guaranteed AC performance over temp and voltage:
DC-to >2.5Gbps data rate through put
DC-to >2.5GHz clock fMAx
●< 400ps In-to-Out tpd
●< 200ps tltq
■Ultra-low jitter design:
●75fs RMS phase jitter
■Low power: 46mW (typ)
■100k LVPECL output
■Flow-through pinout and fully differential design
■Power supply 3.3V +10%
■-40°C to +85°C temperature range
■Available in ultra-small 8-lead 2mm x 2mm QFN package
APPLICATIONS
■High-speed logic
■Data communications systems
■Wireless communications systems
■Telecom systems
FUNC TIONAL DESCRIPTION
Establishing Static Logic Inputs
Do not leave unused inputs floating. Tie either the true or
complement input to ground. A logic zero is achieved by
connecting the complement input to ground with the true
input floating. For a TTL input, tie a 2.5kQ resistor between
the complement input and ground. See“Input Interface"
section.
For LVDS applications, only point-to-point interfaces are
supported. Due to the current required by the input structure
shown in Figure 1, multi-drop and multi-point architectures
are not supported.
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Stock:
MOQ:
1pcs
