AD9434BCPZ-500 Analog to Digital Converters - ADC 12-Bit 370 MSPS/500 MSPS 1.8 V Analog-to-Digital Converter

AD9434BCPZ-500 Analog to Digital Converters - ADC 12-Bit 370 MSPS/500 MSPS 1.8 V
Analog-to-Digital Converter
Analog Devices Inc. | |
Product Category: | Analog to Digital Converters - ADC |
RoHS: | Details |
AD9434 | |
SMD/SMT | |
LFCSP-56 | |
12 bit | |
1 Channel | |
Parallel, SPI | |
500 MS/s | |
Differential | |
Pipeline | |
1.8 V | |
1.8 V | |
65.9 dB | |
- 40 C | |
+ 85 C | |
Tray | |
Brand: | Analog Devices |
DNL - Differential Nonlinearity: | - 0.95 LSB/1 LSB |
Gain Error: | - 5 %FSR/7 %FSR |
Height: | 0.83 mm |
INL - Integral Nonlinearity: | +/- 1.3 LSB |
Input Voltage: | 1.5 Vp-p |
Length: | 8 mm |
Moisture Sensitive: | Yes |
Number of ADC Inputs: | 1 Input |
Number of Converters: | 1 Converter |
Operating Supply Voltage: | 1.8 V |
Output Type: | LVDS |
Pd - Power Dissipation: | 660 mW |
Power Consumption: | 690 mW |
Product Type: | ADCs - Analog to Digital Converters |
Reference Type: | External, Internal |
Sample and Hold: | Yes |
260 | |
Subcategory: | Data Converter ICs |
Supply Voltage - Max: | 1.8 V |
Supply Voltage - Min: | 1.8 V |
Type: | S/H ADC |
Width: | 8 mm |
Unit Weight: | 0.016014 oz |
Description
The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance,
low power, and easeof use. The part operates at up to a 500 MSPS conversion rateand is optimized for
outstanding dynamic performance in widebandcarrier and broadband systems. All necessary functions,
includinga sample-and-hold and voltage reference, are included on the chipto provide a complete signal
conversion solution. The VREF pincan be used to monitor the internal reference or provide an external
voltage reference (external reference mode must be enabledthrough the SPI port).The ADC requires a
1.8 V analog voltage supply and a differentialclock for full performance operation. The digital outputs are
LVDS(ANSI-644) compatible and support twos complement, offset binaryformat, or Gray code. A data clock
output is available for properoutput data timing.Fabricated on an advanced BiCMOS process, the AD9434
is available in a 56-lead LFCSP, specified over the industrial temperaturerange (−40°C to +85°C). This part
is protected under a U.S. patent.
FEATURES
- SNR = 65 dBFS at fIN up to 250 MHz at 500 MSPS
- ENOB of 10.5 bits at fIN up to 250 MHz at 500 MSPS (−1.0dBFS)
- SFDR = 78 dBc at fIN up to 250 MHz at 500 MSPS (−1.0 dBFS)
- Integrated input buffer
- Excellent linearity
- DNL = ±0.5 LSB typical
- INL = ±0.6 LSB typical
- LVDS at 500 MSPS (ANSI-644 levels)
- 1 GHz full power analog bandwidth
- On-chip reference, no external decoupling required
- Low power dissipation
- 690 mW at 500 MSPS—LVDS SDR mode
- 660 mW at 500 MSPS—LVDS DDR mode
- Programmable (nominal) input voltage range
- 1.18 V p-p to 1.6 V p-p, 1.5 V p-p nominal
- 1.8 V analog and digital supply operation
- Selectable output data format (offset binary, twos complement,Gray code)
- Clock duty cycle stabilizer
- Integrated data clock output with programmable clock and dataalignment
APPLICATIONS
- Wireless and wired broadband communications
- Cable reverse path
- Communications test equipment
- Radar and satellite subsystems
- Power amplifier linearization

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